Regenerating circuit for binary signals in the form of a keyed flip-flop

ABSTRACT

A regenerating circuit for binary signals in the form of a keyed flip-flop with one labile and two stable points has at least two inverting amplifier stages, featuring feedback, in particular for the stored signals and for the read-out signals of integrated single transistor storage elements which form a storage field. The storage elements of the storage field are connected by way of a digit line to the regenerating circuit and the inverting amplifier stages may be adjusted into the region of the labile point of the circuit by means of a feedback device by way of an inverter stage or an odd number of inverter stages.

United States Patent [1 1 Stein et al.

[451 Feb. 25, 1975 REGENERATING CIRCUIT FOR BINARY SIGNALS IN THE FORMOF A KEYED FLIP-FLOP Inventors: Karl-Ulrich Stein; Karl Goser, both ofMunich, Germany Siemens Aktiengesellschaft, Berlin and Munich, GermanyFiled: Dec. 19, 1973 Appl. No.: 426,036

Assignee:

Foreign Application Priority Data Dec. 19, 1972 Germany 2262171References Cited I UNITED STATES PATENTS 12/1966 Brooksby 340/173 FF3/1972 Lockwood 340/173 R 3,774,176 9/1972 Stein et al. 340/173 FF OTHERPUBLICATIONS Kleep et al., Regenerative Controlled Decay Storage Cell,IBM Technical Disclosure Bulletin, Vol. 14, No. 1, 6/71, p. 270.

Primary Examiner-Stuart N. Hecker Attorney, Agent, or FirmHill, Gross,Simpson, Van Santen, Steadman, Chiara & Simpson ABSTRACT A regeneratingcircuit for binary signals in the form of a keyed flip-flop with onelabile and two stable points has at least two inverting amplifierstages, featuring feedback, in particular for the stored signals and forthe read-out signals of integrated single transistor storage elementswhich form a storage field. The storage elements of the storage fieldare connected by way of a digit line to the regenerating circuit and theinverting amplifier stages may be adjusted into the region of the labilepoint of the circuit by means of a feedback device by way of an inverterstage or an odd number of inverter stages.

7 Claims, 7 Drawing Figures IF r 16 I18 REGENERATING CIRCUIT FOR BINARYSIGNALS IN THE FORM OF A KEYED FLIP-FLOP BACKGROUND OF THE INVENTION 1.Field of the Invention This invention relates to a regenerating circuitfor binary signals in the form of a keyed flip-flop having one labileand two stable points, and more specifically to a regenerating circuitwhich comprises at least two inverting amplifier stages with feedback,and which is provided for the storage signals and the read-out signalsof integrated single transistor storage elements of a storage field,wherein the storage elements of the storage field are connected by wayof a digit line to the regenerating circuit.

2. Description of the Prior Art Regenerating circuits for storagesignals and read-out signals of integrated single transistor storageelements are well known in the art. In an earlier patent application,now U.S. Pat. No. 3,774,176 assigned to Siemens Aktiengesellschaft, aregenerating circuit of this type is described in which the input andoutput points of the flip-flop of the regenerating circuit are broughtto the same potential by means of an electronic switch prior to aread-out process. Therefore, the flip-flop is brought to its monostablepoint. In the case of a fully symmetrical flip-flop, this pointcorresponds to the labile point from which the flip-flop is switchedinto one of the two stable points.

The production tolerances of the transistors of the flipflop cause theflip-flop to be generally asymmetrical. In an asymmetrical flip-flop ofthis type, the labile and the monostable point do not coincide, whichresults in the circuit failing to analyze, or in it incorrectlyanalyzing, small read-out signals.

SUMMARY OF THE INVENTION An object of the invention is to provide aregenerating circuit in which the abovementioned disadvantages, whichare due to asymmetry, are avoided or reduced.

The aforementioned object is realized through the provision of aregenerating circuit having inverting amplifier stages which may beadjusted into the region of the labile point of the circuit by means ofa device connected for feedback by way of an inverter stage or an oddnumber of inverter stages.

A particular advantage of a circuit constructed in accordance with theinvention resides in the ability to increase the yield of utilizablecircuits during production of regenerating circuits in which all theread-out signals are correctly evaluated and regenerated.

It is advantageously possible to produce even very small read-outsignals with the aid of the regenerating circuits in accordance with theinvention.

Preferably,- the device consists of at least one transistor whichconnects to another the input and the output of each individualinverting amplifier stage, wherein the flip-flop arms may be separatedby electronic switching elements.

Advantageously, the aforementioned arrangement is particularly wellsuited for a symmetrical design of the flip-flop of the regeneratingcircuit.

The device, according to the invention, preferably comprises a further,inverting amplifier stage, the output of which is connected to the inputand electronic switches arranged between the individual invertingamplifier stages.

This type of arrangement is advantageously particularly well suited foran asymmetrical design of the flipflop of the regenerating circuit.

BRIEF DESCRIPTION OF THE DRAWING Other objects, features and advantagesof the invention, its organization, construction and operation will bebest understood from the following description of preferred embodimentsof the invention, taken in conjunction with the accompanying drawings,on which:

FIG. 1 is a schematic circuit diagram of a known flipflop in which anelectronic switch is connected between the input and output points;

FIG. 2 is a graphic illustration of the characteristic curve of aflip-flop constructed as illustrated in FIG. 1;

FIG. 3 schematically illustrates the characteristic curve of a flip-flopwhich is asymmetrical, due to production tolerances of the transistor;

FIG. 4 is a schematic diagram of a regenerating circuit constructed inaccordance with the invention;

FIG. 5 is a pulse diagram provided to aid in the explanation of thefunctional sequence of the regenerating circuit illustrated in FIG. 4;and

FIGS. 6 and 7 schematically illustrate additional regenerating circuitsconstructed in accordance with the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The flip-flop circuitillustrated in FIG. 1 fundamentally consists of two switchingtransistors 3 and 4 and corresponding load resistors 5 and 6. The loadresistors take the form of field effect transistors, the gate terminalsof the transistor in each case being connected to their drainelectrodes. The input and output points of the regenerating circuit arereferenced 1 and 2. The point 1 is connected to a digit line 11 and thepoint 2 is connected to a digit line 12. The read out signals aresupplied by way of the digit lines to the regenerating circuit.

An electronic switch 10 is provided between the points 1 and 2. In theelectrically conductive state of the electronic switch 10, the points 1and 2 are electrically connected to one another and therefore inevitablycarry approximately the same potential. In the electrically blockedstate of the transistor 10, the points 1 and 2, as is typical. of aflip-flop circuit, can assume two stable points which are complementaryto each other, when an appropriate electrical supply voltage isconnected to the terminals 8 and 9 of the flip-flop circuit. The switchover of the transistor 10 from one state to the other is effected by theapplication of an appropriate potential to the terminal 7, its gateelectrode. As a result of the electric short circuit between the points1 and 2,- the flip-flop circuit is, prior to the read-out pro cess,forced into an operative point-the labile pointwhich represents thelabile state of equilibrium between the two stable states of theflip-flop circuit.

FIG. 2 represents the behavior of the flip-flop circuit illustrated inFIG. 1 in dependence upon the voltages U and U applied to the points 1and 2. If the transistor 10 is rendered conductive, then the monostablepoint 23, depending upon which stable state the flipflop has assumed, isreached on one of the curve arms 31 or 32. In the case of a completelysymmetrical flipflop, this point 23 lies on a straight line 24 whichseparates the two stable states. When the read-out signals pass via thedigit lines to one of the points I or 2, the supply voltage isdisconnected, i.e., no voltage is connected to the points 8 and 9. Theread-out signals change the potential prevailing at the point 1 and atthe point 2, so that the point I and the point 2 carry a potential whichis greater or smaller than the corresponding potential of the point 23in FIG. 2. After the connection of the flip-flop, the read-out signalsare regenerated, i.e., the original charge stored in a storage field isconducted back to this field. Depending upon whether the state or 1 isrecorded back into a storage field, the characteristic curve 310 or 320will apply.

Production tolerances in the transistors of the flipflop cause asymmetryof the flip-flop. In this case, the monostable point 23 no longer lieson the straight line 24 which divided the two stable states of theflip-flop from each other. Instead, the point 23, as represented in FIG.3, lies outside the straight line 26 separating the stable states. If,at the point 1 of the flip-flop, there now occurs avoltage which issmaller than or equal to the voltage represented by the arrow 27, thisvoltage is evaluated as 0. That is to say, that in order to be able toevaluate a voltage through a flip-flop as a I, this voltage must begreater than the distance of the point 23 from the straight line 26.

In accordance with the invention, it is now proposed that suitablemeasures be introduced to displace the point 23 in such a manner that itlies as close as possible to the straight line 26, i.e., that thevoltage which must be applied in order to be able to pass from the point23 to the other side of the straight line 26, is now as low as possible.

Regenerating circuit constructed in accordance with the invention, inwhich the point 23 lies close to the straight line 26, will be describedbelow.

The regenerating circuit illustrated in FIG. 4 again comprises thetwoswitching transistors 3 and 4 and the twoload elements 5 and 6.Details of FIG. 4 which have already been described bear the samereference characters. The flip-flop illustrated in FIG. 4 differs fromthat in FIG. 1 in that, in accordance with the invention, thetwoflip-flop arms may be cut off prior to read-out by rneans of twoelectronic switches 12 and 13, which are preferably, as are thetransistors 3, 4, 5 and 6, field effect transistors. Likewise, prior toread-out, the potential is individually set at the points '1 and 2 byway of a pair of transistors 14 and 15, which are preferably also fieldeffect transistors. The transistors 12 and 13 are able to be operated byway of the input 130, and the transistors 14 and 15 may be operated byapplication ofa suitable potential to the input 140. FIG. 5schematically illustrates the pulses which are applied to the individualinputs of the regenerating circuit.

At the time tl,'the flip-flop of the regenerating circuit potential.

simultaneously switched conductive by means of the application of the,potential 1r140, which preferably amounts to lOV. These switchingprocesses cause the potentials U and U carried at the time t2 by thepoints 1 and 2 to be changed in a predetermined manner. In FIG. 5, it isto be assumed that the potential U connected to the'node l is reducedand that the potential U connected to the node 2 is increased. At thetime t3, the flip-flop is switched off. For this purpose, the potential0 is applied to the input 9, and the potential 7T8 of -l0V is applied tothe input 8. By way of the input 140,

the transistors 14 and 15 are again blocked at the time t4 prior to thearrival of the read-out signal. At the time [5, the read-out signal willbe assumed to arrive by way of the digit line 11 at the point 1.Consequently, the potential U prevailing at this point is increased, orreduced, in accordance with the nature of the read-out signal. Thegraphic illustration represents a readout signal which increases thepotential U Since, as illustrated' in the drawing, no signal arrives byway of the digit line 22 at the point 2, the potential U which prevailprior to the time t5, isretained at this point. At the time t6, theflip-flop is reconnectedQas a result of the application of thepotentials which prevail at the time t1 to the inputs 8 and 9. At thetime [7, the transistors 12 and 13 in the flip-flop arms are renderedconductive again by way of the input 130. In accordance with thepotentials prevailing at the nodes 8 and 9, the flip-flop triggers fromthe labile point into one of its'stable states and the regeneratingprocess commences.

During regeneration, the quantity of charge emitted during the read outprocess from a storage element of the storage field is read into thestorage element.

FIG. 6 illustrates a further development of the .circuit illustrated inFIG. 4. In this further. development, the digit lines 11 and 22 areconnected tothe regenerating circuit ,at the points 33 and 34 shown inthe drawing.

The advantage of this further development resides in that the digitlines connected to-the inverting'amplifier stage, whose input receives afavorable, predetermined In the above described-regenerating circuitsconstructed in accordance with the invention, the adjustis switched on.In the following discussion, it will be assumed that the regeneratingcircuit is designed in the n-channel technique. Therefore, at the timet1, the input 9 carries negative potential, for example 179 10V, whereasthe input 8, for example, carries the potential of r8 0V. At the timet2, the read-out process is' introduced. First of all, the potential1rl30, which amounts for example to 10V is cut off from the input 130.This has the effect of blocking the transistors 12 and 13. in theflip-flop arms which were previously conductive. Advantageously, thetransistors 14 and 15 are ment of the potentials at the points land}prior to the read-out process, sets an operative point which liesconsiderably closer to the labile point of the flip-flop than is thecase in the earlier circuits of US. Pat. No. 1

aforementioned advantagesare also achieved when thecircuits are used inan asymmetrical flip-flop.

The regenerating-circuit illustrated in FIG. 7 is particularly wellsuited for an asymmetrical design of the regenerating flip-flop. Detailsin FIG. 7 which have already been described in this reference to othercircuits bear the same reference characters. In a flip-flop arm of theregenerating circuit there is arranged an inverter which consists of thetransistors 18 and 19. Preferably, the transistors 18 and 19 are alsofield effect transistors. The inverter may be bridged by a transistor 16which may be operated by way of an input 160. It is possible to cut offthe output of the inverter from the flip-flop by way of a transistor'l7.If the transistor 16 is rendered conductive, and if the transistor 17blocks, the represented regenerating circuit is bistable. If, on theother hand, the transistor 16 blocks and the transistor 17 is renderedconductive, the regenerating circuit is monostable. In a bistable stateof the regenerating circuit, the potentials across the points 1 and 2correspond to the potentials of the labile point. The digit lines 11 and22 are preferably connected to the points 1 and 33.

If the regenerating flip-flop is of asymmetrical design, and if only onedigit line is connected, in the event of a suitable dimensioning of theflip-flop it is possible to achieve shorter regenerating times than withthe circuit illustrated in FIG. 7, with two connected digit lines.

In addition to the advantage of shorter regenerating times, incomparison to the regenerating circuits represented in FIGS. 1, 4 and 6,the above-mentioned regenerating circuit possesses the advantage thatthe dis tance between the monostable and the labile point is shorter.

Although we have described our invention by reference to a particularillustrative embodiment thereof, many changes and modifications of theinventions may become apparent to those skilled in the art without departing from the spirit and scope of the invention. We therefore intendto include within the patent warranted hereon all such changes andmodifications as may reasonably and properly be included within thescope of our contribution to the art.

We claim:

1. In a regenerating circuit for binary signals, in the form of a keyedflip-flop having one labile and two stable points, and with at least twoinverting amplifierstages each including a switching transistor and aload transistor, in particular for stored signals and for the readout ofintegrated single transistor storage elements which form a storage fieldin which the storage elements of the storage field are connected by wayof a digit line to the regenerating circuit, the improvement thereincomprising means for adjusting the inverting amplifier stages into theregion of the labile point of the regenerating circuit, including afeedback circuit which comprises an odd number of inverter stages.

2. A regenerating circuit as set forth in claim I,

wherein said feedback circuit comprises at least one transistorconnecting the input and output of each inverting amplifier stage, andwherein said flip-flop includes separately conducting feedback paths andelectronic switching elements for opening and closing said paths.

3. A regenerating circuit according to claim 1 wherein each saidswitching transistor has a gate electrode connected to a digit line.

4. A regenerating circuit according to claim 1 wherein each saidswitching transistor has a drain electrode connected to a digit line.

5. A regenerating circuit according to claim 1, wherein the output ofsaid inverter stage is connected to the input of an inverting amplifierstage so that the regenerating circuit comprises two inverting amplifierstages and one inverter stage connected in a chain.

6. A regenerating circuit according to claim 5, comprising electronicswitches connected between the individual inverting amplifier stages.

7. A regenerating circuit according to claim 6, wherein said electronicswitches and said inverting amplifier stages and said inverter stage areeach constituted by field effect transistors.

1. In a regenerating circuit for binary signals, in the form of a keyedflip-flop having one labile and two stable points, and with at least twoinverting amplifier stages each including a switching transistor and aload transistor, in particular for stored signals and for the read-outof integrated single transistor storage elements which form a storagefield in which the storage elements of the storage field are connectedby way of a digit line to the regenerating circuit, the improvementtherein comprising means for adjusting the inverting amplifier stagesinto the region of the labile point of the regenerating circuit,including a feedback circuit which comprises an odd number of inverterstages.
 2. A regenerating circuit as set forth in claim 1, wherein saidfeedback circuit comprises at least one transistor connecting the inputand output of each inverting amplifier stage, and wherein said flip-flopincludes separately conducting feedback paths and electronic switchingelements for opening and closing said paths.
 3. A regenerating circuitaccording to claim 1 wherein each said switching transistor has a gateelectrode connected to a digit line.
 4. A regenerating circuit accordingto claim 1 wherein each said switching transistor has a drain electrodeconnected to a digit line.
 5. A regenerating circuit according to claim1, wherein the output of said inverter stage is connected to the inputof an inverting amplifier stage so that the regenerating circuitcomprises two inverting amplifier stages and one inverter stageconnected in a chain.
 6. A regenerating circuit according to claim 5,comprising electronic switches connected between the individualinverting amplifier stages.
 7. A regenerating circuit according to claim6, wherein said electronic switches and said inverting amplifier stagesand said inverter stage are each constituted by field effecttransistors.